As the value and use of information continues to increase, individuals and businesses continually seek additional ways to process and store information. One option available to users of information is an information handling system. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems may include a processor, sometimes referred to as a microprocessor, and an associated chip set. A chip set is a set of components that are designed to work with the processor and form a portion of the hardware architecture of the computer system or information handling system. Typically, the processor of a computer system will consume a large amount of power. In the case of a portable or laptop computer system, the power consumption by the processor will limit the effective use of the computer, as the power consumed by the processor will drain the local battery of the portable computer, limiting the ability to use the portable computer system without an external power source. One technique for limiting the amount of power consumed by a processor in a laptop computer system involves placing the processor in a reduced power state. A processor may have one or more reduced power states. While the computer system is in a particular reduced power state, the function of the processor of the computer system may be limited to reduce the power consumed by the computer system.
The processors of many computer systems include an internal cache. A cache memory subsystem improves the performance of a computer system. A cache memory is typically a smaller, higher performance memory system, as compared to the larger but slower system memory. Frequently accessed instructions and data can be stored in the cache, thereby allowing the processor to access this data from the cache while avoiding the more time-consuming task of accessing frequently used data from system memory.
Access to the local or CPU cache by the processor includes both writes and reads. In a write-back cache, a write to the local cache does not automatically result in a corresponding write to the memory location in system memory. Instead, when a cache line is removed from the cache, the content of that cache line is written to system memory if that cache line has been modified. It is also recognized that an access to system memory may be initiated by bus masters other than the processor of the computer system. A USB host controller, for example, may access system memory as a bus master. As part of an access to system memory by a bus master other than the processor, a snoop operation is performed by the processor to determine if the bus master is attempting to access an address line in system memory that exists in modified form in the internal processor cache. If this snoop cycle were not included as part the memory access by the bus master, the bus master would run the risk of accessing from system memory data that had been previously modified in the local or CPU cache.
In some reduced power states, however, the local or CPU cache is not in a snoopable state. As such, a snoop operation cannot be performed to determine if the bus master is attempting to access a memory address that exists in modified form in the cache. Under these conditions, at least two undesirable approaches exist for the computer system. First, the computer system and the processor could be transferred out of its reduced power state into a snoopable, higher power state that would permit a snoop operation. This approach is undesirable, however, in that it results in excessive power consumption and frequent and time-consuming switching between power states. As a second approach, the bus master could simply access the data in the system memory without the benefit of the snoop operation. Following this approach, however, the bus master may access a dirty memory address, i.e., a memory location that is associated with modified data in the processor's internal cache.